42507 ti pc b8-7472 no.8768-1/7 specifications of any and all sanyo semiconductor co.,l td. products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer ' s products or equipment. to verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer ' sproductsor equipment. any and all sanyo semiconductor co.,ltd. products described or contained herein are, with regard to "standard application", intended for the use as general el ectronics equipment (home appliances, av equipment, communication device, office equipment, industrial equ ipment etc.). the products mentioned herein shall not be intended for use for any "special application" (medica l equipment whose purpose is to sustain life, aerospace instrument, nuclear control device, burning appliances, t ransportation machine, traffic signal system, safety equipment etc.) that shall require extremely high level of re liability and can directly threaten human lives in case of failure or malfunction of the product or may cause har m to human bodies, nor shall they grant any guarantee thereof. if you should intend to use our products for app lications outside the standard applications of our customer who is considering such use and/or outside the scope of our intended standard applications, please consult with us prior to the intended use. if there is n o consultation or inquiry before the intended use, our customer shall be solely responsible for the use. LA6548NH overview the LA6548NH is a four-channel driver ic for cd players and recorders (four btl amplifier channels). functions ? four btl connection power amplifier channels ? i o max 0.7a ? built-in level shifters ? muting circuit (on/off control of all outputs) (this circuit applies to the btl amplifier circuits. it does not control operation of the regulator.) ? built-in regulator (provides a 3.3v output using an external pnp transistor) ? thermal protection circuit (thermal shutdown circuit) specifications maximum ratings at ta = 25 c parameter symbol conditions ratings unit supply voltage v cc max 14 v maximum output current i o max for each of the channel 1 to 4 outputs 0.7 a maximum input voltage v in 13 v muting pin application voltage vmute 13 v independent ic 0.8 w allowable power dissipation pd max specified circuit board * 1.8 w operating temperature topr -20 to +75 c storage temperature tstg -55 to +150 c * specified substrate : 76.1mm 114.3mm 1.6mm, glass epoxy board. monolithic linear ic for cd players and recorders four-channel driver ic orderin g numbe r : en8768a
LA6548NH no.8768-2/7 recommended operating conditions at ta = 25 c parameter symbol conditions ratings unit supply voltage 1 v cc 1 4.6 to 13 v supply voltage 2 v cc 2 only used by the btl amplifiers (not used by the 3.3v regulator circuit) 3.9 to 13 v electrical characteristics at ta = 25 c, v cc 1 = v cc 2 = 6v, vref = 1.65v, unless otherwise specified. ratings parameter symbol conditions min typ max unit overall characteristics no-load current drain, on state i cc on all outputs on, mute : high 20 40 ma no-load current drain, off state i cc off all outputs off, mute : low 15 35 ma thermal shutdown circuit operating temperature tsd (design guarantee value *1) 150 175 200 c output amplifier block output offset voltage v off the voltage difference between each of the + or - outputs. -50 50 mv vref input voltage range v in vref 1.3 v cc -1.5 v output voltage v o the voltage across the outputs when r l = 8 2.6 3 v voltage gain, input to output vg the voltage gain from an input to the corresponding +/- outputs.*2 9 db slew rate sr (design guarantee value *1) 0.15 v/ s muting on voltage vmute the voltage at which the output on/off state changes 1.2 v power supply block (using a 2sb632k) 3.3v power supply voltage i o = 200ma 3.13 3.3 3.47 v line regulation v o lin 4.6v v cc 12v 40 100 mv load regulation v o load 5ma i o 200ma 50 150 mv reset block reset pin high-level voltage v o rh 3.08 3.25 3.42 v reset pin low-level voltage v o rl isrl = 2ma, cd-gnd 100 200 mv reset pin threshold voltage v rt *4 2.8 v reset pin hysteresis v hys *5 40 80 160 mv reset pin output delay time td cd = 0.1 f 10 ms *1 : these parameters are not tested. *2 : the gain from input to output when only the v in * pins are used. *3 : the mute pin voltage when the output changes between the on and off states. when the mute pin is high, all the btl amplifi ers will be on, and the when mute is low, all the bt l amplifiers will be off. *4 : the 3.3v regulator voltage when the reset pin goes from high to low. *5 : the 3.3v regulator voltage difference between the reset pin goi ng from high to low the reset pin going from low to high. t hat is, the hysteresis.
LA6548NH no.8768-3/7 package dimensions unit : mm (typ) 3233b block diagram sanyo : hsop28h(375mil) 15.2 (6.2) 0.3 7.9 (4.9) 10.5 2.7 0.8 2.0 (0.8) 1 14 15 28 0.65 0.25 2.45max 0.1 (2.25) heat spreader ambient temperature, ta ? c allowable power dissipation, pd max ? w pd max ? ta 0 1 2 1.5 1.8 0.8 0.48 1.08 0.5 2.5 ? 20 80 60 20 40 010 0 mounted on a circuit board independent ic specified circuit board : 76.1 114.3 1.6mm 3 glass epoxy board 1 2 3 4 5 10 11 12 13 14 6 7 8 9 15 16 25 24 20 19 18 17 21 22 23 26 15.4k 3.3vreg reset 11k 15.4k 11k 15.4k 11k 11k 15.4k 27 28 v cc 1 mute v in 1 vg1 v o 1 + v o 1 - (nc) gnd gnd fr fr (nc) v o 2 - v o 2 + vg2 v in 2 reg_c reg_b v cc 2 vref v in 4 vg4 v o 4 + v o 4 - (nc) (nc) v o 3 - v o 3 + vg3 v in 3 cd reset level shifter level shifter level shifter level shifter mute (output on/off control) connect to the external pnp transistor collector. connect to the external pnp transistor base.
LA6548NH no.8768-4/7 pin functions pin no. pin description 1 v cc 1 power supply (this pin is shorted to v cc 2 (pin 28) 2 mute output on/off control 3 v in 1 channel 1 input 4 vg1 channel 1 input (gain setting) 5 v o 1 + channel 1 output (+) 6 v o 1 - channel 1 output (-) 7 (nc) (this pin must not be used.) 8 (nc) (this pin must not be used.) 9 v o 2 - channel 2 output (-) 10 v o 2 + channel 2 output (+) 11 vg2 channel 2 input (gain setting) 12 v in 2 channel 2 input 13 reg_c connect this pin to the external pnp transist or collector. (this is the 3.3v regulator output) 14 reg_b connect this pin to the external pnp transistor base. 15 reset reset output 16 cd connection for the reset delay time setting capacitor 17 v in 3 channel 3 input 18 vg3 channel 3 input (gain setting) 19 v o 3 + channel 3 output (+) 20 v o 3 - channel 3 output (-) 21 (nc) (this pin must not be used.) 22 (nc) (this pin must not be used.) 23 v o 4 - channel 4 output (-) 24 v o 4 + channel 4 output (+) 25 vg4 channel 4 input (gain setting) 26 v in 4 channel 4 input 27 vref reference voltage input 28 v cc 2 power supply (this pin is shorted to v cc 1 (pin 1) equivalent circuits pin no. pin description equivalent circuit 3 4 12 11 17 18 26 25 v in 1 vg1 v in 2 vg2 v in 3 vg3 v in 4 vg4 input pins. 5 6 10 9 19 20 24 23 v o 1 + v o 1 - v o 2 + v o 2 - v o 3 + v o 3 - v o 4 + v o 4 - output pins. continued on next page. 33k v cc v cc gnd gnd v o *-/+ gnd v in g* 11k gnd v cc v cc v cc gnd v in *
LA6548NH no.8768-5/7 continued from preceding page. pin no. pin description equivalent circuit 2 mute muting control input. the outputs will be on when the mute pin is at the high level. the outputs will be of f when the mute pin is at the low level ; in particular, the outputs go to the high-impedance state at this time. 27 vref reference voltage input. 15 reset reset output. when reg c (3.3vreg) is high, reset will be high. when reg c (3.3vreg) is low, reset will be low. details of operating voltage see section reset operation. 16 cd reset output delay time setting. the delay time until the point the reset output switches from low to high is set by the capacitor connected between this pin and ground. reference to reset operation. 40k 30k v cc v cc gnd mute v cc v cc gnd gnd vref reset gnd v cc reg_c (3.3vreg) gnd v cc cd gnd gnd
LA6548NH no.8768-6/7 application circuit example m m spindle sled tracking focus mute spindle input spindle input 3.3v input + 100 f tracking input focus input vref input (reference voltage) reset delay time setting LA6548NH gnd gnd v cc 1 v cc v cc mute v in 1 v o 1 + v o 1 - (nc) (nc) v o 2 - v o 2 + v in 2 reg_c reg_b 1 2 3 5 6 7 8 9 10 12 13 14 v cc 2 vref v in 4 vg4 vg1 4 v o 4 + v o 4 - (nc) (nc) v o 3 - v o 3 + vg3 vg2 v in 3 cd reset 11 28 27 26 24 23 22 21 20 19 17 16 15 25 18
LA6548NH ps no.8768-7/7 sanyo semiconductor co.,ltd. assumes no responsib ility for equipment failures that result from using products at values that exceed, even momentarily, rate d values (such as maximum ra tings, operating condition ranges, or other parameters) listed in products specif ications of any and all sanyo semiconductor co.,ltd. products described or contained herein. sanyo semiconductor co.,ltd. strives to supply high-qual ity high-reliability products, however, any and all semiconductor products fail or malfunction with some probabi lity. it is possible that these probabilistic failures or malfunction could give rise to acci dents or events that could endanger human lives, trouble that could give rise to smoke or fire, or accidents that could cause dam age to other property. when designing equipment, adopt safety measures so that these kinds of accidents or e vents cannot occur. such measures include but are not limited to protective circuits and error prevention c ircuits for safe design, redundant design, and structural design. upon using the technical information or products descri bed herein, neither warranty nor license shall be granted with regard to intellectual property rights or any other rights of sanyo semiconductor co.,ltd. or any third party. sanyo semiconductor co.,ltd. shall not be liable f or any claim or suits with regard to a third party's intellctual property rights which has resulted from the use of the technical information and products mentioned above. information (including circuit diagr ams and circuit parameters) herein is for example only; it is not guaranteed for volume production. any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. when designing equi pment, refer to the "delivery specification" for the sanyo semiconductor co.,ltd. product that you intend to use. in the event that any or all sanyo semiconductor c o.,ltd. products described or contained herein are controlled under any of applicable local export control laws and regulations, such products may require the export license from the authorities conc erned in accordance with the above law. no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any in formation storage or retrieval system, or otherwise, without the prior written consent of sanyo semiconductor co.,ltd. reset operation *1 : td is the delay time. it is set by an external capacitor connected between the cd pin and ground). *2 : the voltage at which reset changes state is a typical value (voltage). this catalog provides information as of april, 2007. specifications and information herein are subject to change without notice. reg_c (3.3vreg) reset 3.3v 2.8v td td t t 80mv
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